1. Field of the Invention
The present invention relates to data receiving devices for demodulating a modulated signal and, more specifically, to a data receiving device for obtaining a detection signal from a phase-modulated signal through digital signal processing.
2. Description of the Background Art
Conventionally, devices for extracting at least a partial band signal from a received modulated signal for demodulation have been known. Examples of such devices include a data transmitting and receiving device disclosed in Japanese Patent No. 3161146 and a device disclosed in “A Wireless Modem using SR-chirp Spread Spectrum Scheme”, Technical Report of IEICE (The Institute of Electronics, Information and Communication Engineers), RCS95-102.
FIG. 25 is an illustration showing the configuration of a data receiving device disclosed in Japanese Patent No. 3161146. In FIG. 25, the data receiving device includes a frequency mixer 1301, a band-pass filter (denoted as BPF in the drawing) 1302, a local oscillator 1303, a reception state determining section 1304, a delay unit 1305, a multiplier 1306, a low-pass filter (denoted as LPF in the drawing) 1307, and a decoder 1308.
The local oscillator 1303 outputs a local oscillation signal whose frequency can be changed at every interval of an integral multiple of a symbol frequency of the data to be received. The frequency mixer 1301 converts an input spread spectrum signal r(t) into a frequency band representing a difference in frequency band between the input spread spectrum signal r(t) and the local oscillation signal from the local oscillator 1303. Here, it is assumed that this spread spectrum signal r(t) is a phase-modulated signal which can be demodulated by extracting at least one partial band from the signal's frequency band.
The band-pass filter 1302 extracts and then outputs an intermediate signal b(t), which is part of frequency components of the spread spectrum signal r(t) frequency-converted by the frequency mixer 1301.
FIGS. 26A and 26B are illustrations showing signal spectra observed in the data receiving device illustrated in FIG. 25. FIG. 26A is an illustration showing an outline of spectra of the received spread spectrum signal r(t). The local oscillation signal output from the local oscillator 1303 can have three frequencies. Each frequency of the local oscillation signal is an integral multiple of the symbol frequency of the data signal to be received. The center frequency of the local oscillation signal is any one of center frequencies of three partial bands denoted as B1, B2, and B3, respectively.
FIG. 26B is an illustration showing an outline of a spectrum of the intermediate signal b(t). The intermediate signal b(t) is any one of partial bands of B1, B2, and B3 that is obtained by frequency-converting the input spread spectrum signal r(t) and then band-limiting the frequency-converted signal.
The reception state determining section 1304 outputs a band switching signal in accordance with a data reception state so as to switch the frequency of the local oscillation signal output from the local oscillator 1303. Based on the band switching signal output from the reception state determining section 1304, the local oscillator 1303 switches the frequency of the local oscillation signal for output. With this, any one of the partial bands of B1, B2, and B3 is selected. Therefore, the band-pass filter 1302 outputs the intermediate signal b(t) corresponding to the partial band after selection.
The multiplier 1306 multiplies the intermediate signal b(t) by an intermediate signal b(t-Ts) obtained by the delay unit 1305 delaying the intermediate signal b(t) by a symbol period Ts, and then supplies the resultant signal to the low-pass filter 1307. The low-pass filter 1307 performs a low-pass filtering process on the received signal, and then outputs a detection signal c(t). The decoder 1308 decides the polarity of the detection signal c(t), and then outputs a data signal dat(t).
FIG. 27 is a block diagram illustrating the general configuration of a receiving unit in a wireless modem disclosed in “A Wireless Modem using SR-chirp Spread Spectrum Scheme”, Technical Report of IEICE, RCS95-102. In FIG. 27, the receiving unit includes a splitter 1501, a first frequency mixer 1502, a second frequency mixer 1503, a first local oscillator 1504, a second local oscillator 1505, a first band-pass filter 1506, a second band-pass filter 1507, a first gain controller (denoted as AGC1 in the drawing) 1508, a second gain controller (denoted as AGC2 in the drawing) 1509, a first quadrature detector 1510, a second quadrature detector 1511, and a baseband signal processing section 1512.
The receiving unit receives a spread spectrum signal as an input signal, extracts two partial bands simultaneously, and then outputs the received data in accordance with the reception state. This receiving unit has two receiving systems identical in structure to each other, one starting from the first frequency mixer 1502 to the baseband signal processing section 1512 and the other starting from the second frequency mixer 1503 to the baseband signal processing section 1512. The operation of the receiving unit illustrated in FIG. 27 is described below.
The splitter 1501 splits a received spread spectrum signal r(t) into two signals, one being supplied to the first frequency mixer 1502 and the other being supplied to the second frequency mixer 1503. The first local oscillator 1504 and the second local oscillator 1505 output local oscillation signals whose center frequencies are of bands of different band characteristics. The local oscillation signal output from the local oscillator 1504 is supplied to the frequency mixer 1502. The local oscillation signal output from the local oscillator 1505 is supplied to the frequency mixer 1503.
The frequency mixer 1502 converts the split spread spectrum signal r(t) into a signal of a frequency band representing a difference between the split spread spectrum signal and the local oscillation signal output from the local oscillator 1504, and then supplies the resultant signal to the first band-pass filter 1506. The first band-pass filter 1506 extracts a partial signal from the received signal for output to the first gain controller 1508 as a partial band signal b1(t). The first gain controller 1508 controls the amplitude of the partial band signal b1(t) for output to the first quadrature detector 1510. The first quadrature detector 1510 outputs an in-phase component I1(t) and a quadrature component Q1(t) of a first complex baseband signal output from the first gain controller 1508.
The other receiving system starting from the second frequency mixer 1503 operates in the same manner as described above. As a result, the second quadrature detector 1511 outputs an in-phase component I2(t) and a quadrature component Q2(t) of a second complex baseband signal output from the second gain controller 1509. The baseband signal processing section 1512 performs a delay detecting process on a set of I1(t) and Q1(t) of the first complex baseband signal and a set of I2(t) and Q2(t) of the second complex baseband signal. The baseband signal processing section 1512 then outputs the received data of one of the receiving systems which is determined as having less errors based on, for example, the reception state of these receiving systems. Alternatively, the receiving system can be selected based on the reception level for outputting the received data.
FIG. 28 is an illustration showing one example of a structure of a delay detector provided in the baseband signal processing section 1512. In the baseband signal processing section 1512, one delay detector is provided correspondingly to each of the quadrature detectors. In FIG. 28, only one delay detector is representatively illustrated. In FIG. 28, the delay detector includes a first sampler 1101, a second sampler 1102, a delay detection operating section 1103, a first post-detection filter 1104, and a second post-detection filter 1105.
The first sampler 1101 samples the in-phase component i(t) of the complex baseband signal (I1(t) or I2(t) in FIG. 27) to output an in-phase component data string I(nT) of the sampled complex baseband signal to the delay detection operating section 1103. Here, n is an integer (n= . . . −1, 0, 1, . . . ), and T is a sampling period. Similarly, the second sampler 1102 samples the quadrature component q(t) of the complex baseband signal (Q1(t) or Q2(t) in FIG. 22) to output a quadrature component data string Q(nT) of the sampled complex baseband signal to the delay detection operating section 1103.
FIG. 29 is an illustration showing the structure of the delay detection operating section 1103. In FIG. 29, the delay detection operating section 1103 includes a first selector 1201, a second selector 1202, a delay unit 1203, a sign changer 1204, a first multiplier 1205, and a second multiplier 1206. The first selector 1201 alternately selects the data strings I(nT) and Q(nT) for each sampling period, and then outputs the selected data string as S1(nT). The second selector 1202 alternately selects a data string −I(nT) output from the sign changer 1204 by reversing the sign of the data string I(nT) and the data string Q(nT) for each sampling frequency T, and then outputs the selected data string as S2(nT).
It is set so that, upon a selection of I(nT) by the first selector 1201, the second selector 1202 always selects Q(nT). It is also set so that, upon a selection of Q(nT) by the first selector 1201, the second selector 1202 always selects −I(nT).
The delay unit 1203 receives the data string S1(nT) as an input signal, and then outputs a signal by delaying S1(nT) by one symbol time length kT. Here, k represents the number of samplings per symbol. With this, the first multiplier 1205 alternately outputs, for each sampling period T, I(nT)I{(n−k)T}, which is the product of the in-phase component data string of the sampled complex baseband signal and the delayed in-phase component data string thereof, and Q(nT)Q{(n−k)T}, which is the product of the quadrature component data string of the sampled complex baseband signal and the delayed quadrature component data string thereof. The output from the first multiplier 1205 is referred to as a signal F1(nT). The second multiplier 1206 alternately outputs, for each sampling period T, I{(n−k)T}Q(nT), which is the product of the delayed in-phase component data string of the sampled complex baseband signal and the quadrature component data string thereof, and −I(nT)Q{(n−k)T}, which is the product of the sign-changed in-phase component data string of the sampled complex baseband signal and the delayed quadrature component data string thereof. The output from the second multiplier 1206 is referred to as a signal F2(nT).
The first post-detection filter 1104 performs a low-pass filtering process on the received signal F1(nT) to output a signal D1(nT), which is equivalent to a signal obtained by adding I(nT)I{(n−k)T} and Q(nT)Q{(n−k)T}. Similarly, the second post-detection filter 1105 performs a low-pass filtering process on the received signal F2(nT) to output a signal D2(nT), which is equivalent to a signal obtained by adding I{(n−k)T}Q(nT) and −I(nT)Q{(n−k)T}.
D1(nT) corresponds to an in-phase component of the multiplication result obtained by multiplying a complex number of A(nT)=I(nT)+jQ(nT) and a complex conjugate of A{(n−k)T}, which is delayed from A(nT) by one symbol time length kT. D2(nT) corresponds to a quadrature component of the above-stated multiplication result. Here, I(nT) represents an in-phase component, Q(nT) represents a quadrature component, and j represents an imaginary unit. Therefore, a phase represented by D1(nT) and D2(nT) shows a difference in phase between A(nT) and A{(n−k)T}. For this reason, by using D1(nT) and D2(nT), the received data can be demodulated through a decision circuit (not shown), for example.
As such, in order to obtain a plurality of demodulating signals for a plurality of partial band signals, the receiving unit illustrated in FIG. 27 obtains different complex baseband signals from partial band signals of different frequency band characteristics, and then performs a delay detection operation on each complex baseband to obtain the demodulating signals. Then, based on the reception state, the receiving unit outputs the received data.
In FIG. 27, a case is illustrated in which the number of partial bands to be extracted is two. If three or more partial bands are to be extracted, receiving systems are required as many as the number of partial bands to be extracted, the receiving systems each having the same structure as described above starting from a frequency mixer to a baseband signal processing section.
However, if the data transmitting and receiving device disclosed in Japanese Patent No. 3161146 is used to extract different partial band signals, the frequency of the local oscillator has to be changed. The changing operation disadvantageously takes a certain time.
On the other hand, in the receiving unit disclosed in “A Wireless Modem using SR-chirp Spread Spectrum Scheme”, Technical Report of IEICE, RCS95-102, a plurality of local oscillators are provided in advance. Therefore, the operation of switching the partial band signal to be extracted does not take a long time. However, the receiving unit requires a plurality of analog receiving systems having the same structure starting from a frequency mixer and a baseband signal processing section. In order to equalize the characteristics of these receiving systems, analog circuits included in these systems are required to have approximately the same characteristics. Moreover, the requirement of a plurality of receiving systems causes an increase in hardware structure.
Still further, the hardware structure of the delay detection operating section 1103 in the baseband signal processing section 1512 (refer to FIG. 29) has some disadvantages. For example, signals undesired for demodulation have to be eliminated in advance by using an analog circuit from the complex baseband signal, which is an input signal of the delay detection operating section 1103.
Also, the delay detection operating section 1103 requires one sign changer, two selectors, one delay unit, and two multipliers. Moreover, the delay detector requires two post-detection filters. Therefore, the size of gates is large for LSI, for example, which is not suitable for reduction in size and weight.